Application Design of HPI Interface and PCI Interface Based on VC5402 and PCI2040



Digital Signal Processor DSP (Digital Signal Processor) is a microprocessor that is especially suitable for digital signal processing. With its fast operation speed and powerful functions, it is more and more widely used in various fields. But in many occasions, it is necessary to connect various peripheral devices of DSP with the computer to realize data transmission. Usually, it can be realized by using the serial port or I/O port of DSP, but whether it is connected to the serial port or the I/O port, it will occupy the hardware resources of the DSP, and the data transmission speed can sometimes not meet the requirements of the system.

Authors: Chang Hongliang, Cheng Wei, Cai Xuejing

Digital Signal Processor DSP (Digital Signal Processor) is a microprocessor that is especially suitable for digital signal processing. With its fast operation speed and powerful functions, it is more and more widely used in various fields. But in many occasions, it is necessary to connect various peripheral devices of DSP with the computer to realize data transmission. Usually, it can be realized by using the serial port or I/O port of DSP, but whether it is connected to the serial port or the I/O port, it will occupy the hardware resources of the DSP, and the data transmission speed can sometimes not meet the requirements of the system. In order to solve this problem, the HPI port of the DSP is bridged to the PCI bus through the PCl2040 chip. This article takes TMS320VC5402 (VC5402 for short) as an example to introduce the HPI port of DSP and its interface design with PCl2040.

1 HPI interface functions and features

The host interface HPI (Host Pott Interface) is a parallel interface component in the C54x DSP series fixed-point chip, which is mainly used to communicate with other buses or CPUs. Its interface block diagram is shown in Figure 1. The host is the master of the HPI port, and the HPI port is connected to the host as a peripheral device, which makes the access operation of the host very convenient. The host communicates with the HPI port through the following units: dedicated address and data registers, HPI control registers, and external data and interface control signals. HPI has two working modes: Shared Addressing Mode (SAM) and Host-Only Addressing Mode (HOM). In SAM mode, both Fengji and C54x can address HPI memory; in HOM mode, only the host can address HPI memory, C54x is in reset state, or idle in IDLE2 where all internal and external clocks stop working state (lowest power state).

Application Design of HPI Interface and PCI Interface Based on VC5402 and PCI2040

VC5402 is a cost-effective 16-bit fixed-point processor introduced by TI. It is a widely used chip in the C54x series, has abundant interface resources, and is a high-speed microprocessor that integrates data processing and communication functions. The VC5402 HPI port is an enhanced 8-bit host interface, which communicates with the host through the HPI control register HPIC, address register HPIA and data latch HPID. The host selects different registers through the external pins HCNTLO and HCNTL1, then the current 8-bit data is sent to this register. The control register HPIC can be accessed directly by the host computer or by the on-chip CPU of the DSP. In use, since the host interface always transmits 8-bit bytes, and the HPIC is a 16-bit register, when the host writes data to the HPIC, it needs to send two identical 8-bit data. The address register HPIA can only be accessed directly by the host. The host regards the HPIA register as an address pointer, and with the help of the HPIA host, all the on-chip memories of the VC5402 can be accessed. In addition, HPIA has the function of automatic growth. In the auto-increment addressing mode, a data read will increase the HPIA by 1 after the data read operation, and a data write operation will increase the HPIA by 1 before the operation. In this way, if this function is enabled, the writing and reading of continuous data blocks can be realized only by setting the HPIA once. The data register HPLD can only be accessed by the host. If the current read operation is performed, the data to be read from the HPI memory is stored in the HPID; if the current write operation is performed, the data to be written to the HPI memory is stored.

2 The interface design of HPI port of VC5402 and PCl2040

2.1 PCI bus and its realization method

The PCI local bus is a 32-bit or 64-bit data bus. The 32-bit PCI bus supports a peak transmission rate of 132Mb/s in read and write transmission, and the 64-bit PCI transmission supports a peak transmission rate of 264Mb/s. For the PCI bus of 64-bit 66MHz, the transfer rate can reach 528Mb/s. The PCI bus protocol specification is complex and huge, so it needs to be implemented with the help of a bus interface. There are generally two ways to implement the PCI bus protocol: one is to use FPGA design and implementation, but the PCI protocol is more complicated, so it is more difficult; the other is to use PCI bus control chips, such as AMCC’s S5933 and PLX’s PCI9052 and other general-purpose PCI interface chip. TI has specially launched the chip PCI2040 for PCI bus and DSP interface, which not only realizes the function of PCI bus control, but also provides a seamless interface with DSP chip, thus greatly reducing the complexity of system design and shortening the development time. .

2.2 P012040 and DSP interface design

PCI2040 is a special chip specially designed by TI Company to realize the interface between C5000/C6000 series DSP and PCI bus, and can be seamlessly connected with C54x/C6xDSP through 8-bit or 16-bit HPI interface. PCI2040 is connected with VC5402 through HPI interface. The HPI port of PCI2040 is an 8/16-bit data transmission interface (8-bit or 16-bit, depending on the type of DSP that is attached). The host is the master device of the transmission, and the slave DSP cannot initiate the transmission. The main device PCI2040 can read/write the DSP memory, and the DSP HPl port can access all the on-chip resources of the DSP. The communication between the PCI2040 and the VC5402 is mainly completed by the three registers of the DSP: HPIA, HPIC and HPID. The connection between HPI of VC5402 and PCI2040 port is shown in Figure 2.

Application Design of HPI Interface and PCI Interface Based on VC5402 and PCI2040

The data bus HAD0-HAD7 of PCI2040 is connected with the data bus HD0-HD7 of VC5402 HPI port, which is used for the host computer and DSP to transmit data. The HCNTL1 and HCNTL0 pins of the HPI port of the PCI2040 chip are connected to the HCNTL1 and HCNTL0 pins of the DSP, respectively, to realize their access to the HPI register. The selection of the concrete HPI register and the determination of the access mode are determined by the state of the HCNTL1 and HCNTL0 pins of the DSP. Table 1 shows the access control of the VC5402 HPI register. PCI2040 has independent read/write strobe signals HDS and HR/W, which can connect HDS, HR/W pins of PCI2040 with HDSl, HR/W pins of VC5402 to realize the read/write of the VC5402 HPI interface by the host control. When the host drives HR/W high, read HPI; when it is low, write HPI. The HPIEA, HDS2, and HAS pins of the DSP HPI port are pulled high through a 10kΩ resistor.

Application Design of HPI Interface and PCI Interface Based on VC5402 and PCI2040

It should be noted that the HPI connection of VC5402 is 8-bit, and the data format inside the DSP and on the PCI bus is greater than 8-bit, so the data transmission between the host and the DSP must contain 2 consecutive bytes. The dedicated HBIL pin signal determines whether the first byte or the second byte is transferred; the BOB bit in the HPI control register HPIC determines whether the first or second byte is placed in the upper 8 bits of the 16-bit word.

3 Problems that should be paid attention to in circuit design

①VC5402 power supply adopts 3.3V and 1.8V power supply. Among them: I/O adopts 3.3V; The core voltage adopts 1.8V power supply; The system takes 5V voltage from PCI slot after voltage conversion, for DSP and other chips to use.

②Some pins of VC5402 must be connected to a 4.7kΩ pull-up resistor, and the unused interrupt pins should also be connected to the same pull-up resistor.

③Connect a 10-100μF electrolytic capacitor across the power input, and configure a 0.01μF ceramic capacitor for each integrated circuit chip.

Epilogue

This article takes VC5402 and PCI2040 as examples. The HPI interface of DSP and the hardware interface of the dedicated PCI interface chip PCI2040 are introduced in detail. Practice has proved that using PCI2040 chip to realize the PCI bus of C54x/C6x DSP can greatly reduce the corresponding peripheral devices, enhance the reliability of the system, reduce the difficulty of system development, and shorten the development cycle.

The Links:   6R1MBI125LP-160-54 6MBI25J-120