Behavior of the gate-source voltage when the low-side switch is on



[Introduction]In the previous article, the current and voltage conditions caused by the change of VDS and ID caused by the switching operation of the gate drive circuit in the SiC MOSFET bridge structure were briefly introduced. This article will detail the behavior of the SiC MOSFET when the LS is turned on.

In the previous article, the current and voltage conditions caused by the change of VDS and ID caused by the switching operation of the gate drive circuit in the SiC MOSFET bridge structure were briefly introduced. This article will detail the behavior of the SiC MOSFET when the LS is turned on.

Behavior of gate-source voltage when SiC MOSFET low-side switch is on

When the LS of the SiC MOSFET is turned on, first the ID changes (the following waveform diagram T1). At this time, the ID of LS flows in the increasing direction, and the ID of HS flows in the decreasing direction, and is affected by the event (I) shown in the following equivalent circuit diagram, and the polarity shown in the diagram generates the electromotive force of the formula (1). Equation (1) is the same formula used in the previous article. The current caused by this electromotive force uses the source side as the positive electrode to charge the CGS, so the LS will push the VGS down, and the HS will pull the VGS to the negative side, causing it to generate a negative surge (T1 of the waveform diagram VGS).

Behavior of the gate-source voltage when the low-side switch is on

Behavior of the gate-source voltage when the low-side switch is on

Behavior of the gate-source voltage when the low-side switch is on

When the change of ID ends, the potential of VDS of LS decreases (waveform diagram T2). Therefore, the current in equation (2) flows like (II)-1, (II)-2 in the equivalent circuit diagram, and VGS causes the voltage rise in the following equations (3), (4), respectively.

Behavior of the gate-source voltage when the low-side switch is on

After VDS just started to change, the VGS of formula (3) mainly rose, and as time went by, the VGS of formula (4) also began to rise. That is, the CGD/CGS ratio of the MOSFET, the RG_EXT of the drive circuit, and the inductance value LTRACE of the gate drive signal pattern wiring have a great influence.

As shown in the equivalent circuit diagram, the current ICGD2 of (II)-2 in HS is in the VGS raising direction. Therefore, the HS, which should be in the OFF state, starts the conduction operation due to the increase of VGS. This phenomenon is called “false start”. When the HS has a false start, it will overlap with the conduction of the LS, causing the MOSFETs of the HS and LS to be turned on at the same time, thereby causing a shoot-through current.

ICGD2 continues to flow until the ON operation of LS ends, and is accumulated in LTRACE, but disappears at the time when the change of VSW ends, and LTRACE generates electromotive force. This is event (III). Depending on switching conditions such as RG_EXT, ICGD2 may reach several amps and this EMF may increase.

Affected by the above events (I), (II) and (III), the gate-source voltage after the LS is turned on exhibits the behavior shown in the waveform diagram. The same number in the waveform diagram and the equivalent circuit diagram represents the same event. In addition, the broken-line waveform of VGS in the figure represents an ideal waveform.

Influence of External Gate Resistor

The following is the double-pulse test result when the LS of the SiC MOSFET bridge structure is turned on. (a) The external gate resistance RG_EXT of the waveform diagram is 0Ω, (b) is 10Ω. (I), (II), (III) in the figure are the same as the previous events with corresponding numbers.

Behavior of the gate-source voltage when the low-side switch is on

Comparing the waveforms of (a) and (b), it can be seen that the smaller the RG_EXT, the greater the VGS drop caused by event (I). Furthermore, since the switching speed is very fast, event (III) is prominent in (a); but since RG_EXT is 0Ω, the waveform of event (II) is hardly observed. On the other hand, in (b), the VGS lift caused by event (II)-2 and RG_EXT is obvious.

From this result, it is clear that to reduce the VGS lift of event (II)-2, which induces HS misstart when LS is on, it is necessary to reduce the external gate resistor RG_EXT when HS is off. However, in most cases, the RG_EXT of HS and LS is the same, so when RG_EXT is decreased, the dVDS/dt of LS will increase, as shown in equation (1), the ICGD of HS will increase. As can be seen from equation (4), the result is an elevated HS surge.

One countermeasure is to separate RG_EXT during turn-on and turn-off, and reduce only RG_EXT at turn-off. The conventional method is to use a diode, as shown in the figure to the right. Using this method, in the ON state the only resistor that works is RG_ON, while in the OFF state the diode conducts and becomes a parallel resistor of RG_ON and RG_OFF. Therefore, the resistance value at turn-off becomes smaller than the resistance value at turn-on.

Behavior of the gate-source voltage when the low-side switch is on

In addition, unlike the waveform diagram used in the previous explanation, the reason why the VGS waveform of HS oscillates to the positive side immediately before the event (I) is the electromotive force caused by LSOURCE at the moment when the current of the event (I) starts to flow was observed immediately after passing through CGS.

(Source: Rohm)

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