The process will build on Tower’s PH18 production silicon photonics platform and add Quintessent’s III-V quantum dot-based lasers and optical amplifiers to enable a complete suite of active and passive silicon photonic elements.
The resulting capability will demonstrate integrated optical gain in a standard foundry silicon photonics process.
The initial PDK is planned in 2021, with MPW runs following in 2022.
The co-integration of lasers and amplifiers with silicon photonics at the circuit element level will improve overall power efficiency, eliminate traditional design constraints such as on-chip loss budgets, simplify packaging, and make possible new product architectures and functionalities.
For example, a silicon photonic transceiver or sensor product with integrated lasers will be capable of complete self-test at the chip or wafer level.
These advantages are further enhanced by employing Semiconductor quantum-dots as the active optical gain media, which enables devices with greater reliability, lower noise, and the ability to operate efficiently at higher temperatures.
“Bringing the III-V laser diode within our silicon photonics platform will enable single-chip photonic integrated circuit (PIC) design. This means that both III-V quantum dot amplifiers and lasers, and Tower’s silicon photonics passive and active elements, will be delivered by a foundry through a single MPW chip run,” said Dr. David Howard, Tower Semiconductor Executive Director, and Fellow.
The augmented PH18 process is part of DARPA’s Lasers for Universal Microscale Optical Systems (LUMOS) program, which aims to bring high-performance lasers to advanced photonics platforms, addressing commercial and defense applications.
For further information about Tower Semiconductor’s Silicon Photonics platform, visit here.